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Текущее время: 01 ноя 2024, 04:06
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Сообщения без ответов | Активные темы
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ars44
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Заголовок сообщения: Re: Dell N5050 - хаб или винт? Добавлено: 27 фев 2013, 11:58 |
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Зарегистрирован: 22 дек 2010, 02:51 Наличности на руках: 6,828.01
Сообщения: 2947 Откуда: Norge
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Подобных проблем я не замечал с этими мостами. Однако вот что пишет сам производитель:
SATA Signal Voltage Level Violation Problem: SATA transmit buffers have been designed to maximize performance and robustness over a variety of routing scenarios. As a result, the SATA transmit signaling voltage levels may exceed the maximum motherboard TX connector and device RX connector voltage specifications as defined in section 7.2.1 of the Serial ATA specification, rev 3.0. This issue applies to Gen 1 (1.5 Gb/s) and Gen 2 (3.0 Gb/s). Implication: None known. Workaround: None. Status: No Plan to Fix.
SATA Differential Return Loss Violations Problem: The Intel 6 Series Chipset and Intel C200 Series Chipset SATA buffer capacitance may be higher than expected. Implication: There are no known functional failures. This may cause a violation of the SATA-IO* compliance test for Receiver or Transmitter Differential Return Loss. Workaround: None. Note: Intel has obtained a waiver for the SATA-IO building block status. Status: No Plan to Fix.
SATA Ports 2-5 Issue Problem: Due to a circuit design issue on Intel 6 Series Chipset and Intel C200 Series Chipset, electrical lifetime wear out may affect clock distribution for SATA ports 2-5. This may manifest itself as a functional issue on SATA ports 2-5 over time. • The electrical lifetime wear out may result in device oxide degradation which over time can cause drain to gate leakage current. • This issue has time, temperature and voltage sensitivities. Implication: The increased leakage current may result in an unstable clock and potentially functional issues on SATA ports 2-5 in the form of receive errors, transmit errors, and unrecognized drives. • Data saved or stored prior to functional issues on a SATA device will be retrievable if connected to a working SATA port. • SATA ports 0-1 are not affected by this design issue as they have separate clock generation circuitry. Workaround: Intel has worked with board and system manufacturers to identify and implement solutions for affected systems. • Use only SATA ports 0-1. • Use an add-in PCIe SATA bridge solution. Status: Fixed. For steppings affected, see the Summary Table of Changes. • This issue has been resolved with a silicon stepping for all Intel 6 Series Chipset and Intel C200 Series Chipset incorporating a minor metal layer change. • The fix does not impact the designed functionality and electrical specifications of the Intel 6 Series Chipset and Intel C200 Series Chipset.
SATA Hot Plug Operation Section 5.16.5 Hot Plug Operation is modified as shown below. Section 5.16.5.1 is removed. The PCH supports Hot Plug Surprise removal and Insertion Notification. An internal SATA port with a Mechanical Presence Switch can support PARTIAL and SLUMBER with Hot Plug Enabled. Software can take advantage of power savings in the low power states while enabling hot plug operation. Refer to chapter 7 of the AHCI specification for details.
_________________ Опыт приходит с годами. Все наши беды и проблемы, от недостатка знаний. Умный и у дурака научится, а дураку и Ейнштейн не поможет.
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Вы не можете начинать темы Вы не можете отвечать на сообщения Вы не можете редактировать свои сообщения Вы не можете удалять свои сообщения Вы не можете добавлять вложения
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